ASIC

An application-specific integrated circuit is a silicon die engineered to perform a narrow, fixed set of functions. Unlike a general-purpose processor, which executes whatever instructions you feed it, an ASIC's logic is etched into the silicon at manufacture time. Once made, it cannot be reprogrammed or reconfigured. It does one thing, and it does it faster and more efficiently than any flexible alternative could.

The core trade-off is upfront cost against per-unit economy and performance. Designing an ASIC requires significant investment in photomasks, simulation, and verification, typically ranging into millions of dollars. But once tooling is paid for, the marginal cost per chip drops sharply, and power consumption falls dramatically compared to software-based solutions running on standard processors. A communications chipset, a motor controller, or a cryptographic accelerator implemented as an ASIC consumes far less energy and operates at higher speed than equivalent logic implemented in firmware.

Where ASICs live in production

ASICs proliferate in high-volume consumer products and infrastructure equipment. Smartphone baseband processors, Ethernet switch fabrics, and power management ICs in industrial drives are almost always ASICs. They are also common in cryptocurrency mining hardware, where the narrow, repetitive nature of the computation justifies both the design cost and the technical risk. Once an ASIC leaves the fab, it is locked in; any design flaw cannot be patched in the field.

An ASIC differs from a field-programmable gate array (FPGA), which offers reconfigurability at a cost in speed and power, and from a system-on-chip (SoC), which combines an ASIC core with embedded processors and memory. The names reflect the hierarchy: a standard-cell ASIC uses pre-designed logic blocks; a full-custom ASIC involves hand-layout of critical paths; a semi-custom ASIC uses a gate-array template with custom metallization layers.

In industrial settings, ASICs appear wherever performance, energy efficiency, or compactness outweighs the need for flexibility. The penalty for choosing an ASIC is long lead time, typically 6 to 18 months from tape-out to volume production, and inflexibility in the face of specification changes or discovered bugs. For this reason, ASICs are committed only when the design is mature and demand is predictable.