emitter-coupled logic

Emitter-coupled logic is a digital circuit family built around a differential pair of bipolar junction transistors (BJTs) operating in a specific regime where the transistors never saturate. Instead of switching fully on and off like TTL or CMOS gates, ECL transistors steer current between two possible paths based on the input voltage. This current-steering action, combined with the use of emitter followers for output buffering, allows ECL to achieve propagation delays as low as 1 to 2 nanoseconds per gate in its best implementations.

The core building block is the differential amplifier, typically a long-tailed pair where the two transistor bases receive the logic input and a reference voltage. When the input exceeds the reference, current steers through one transistor; when it falls below, current steers through the other. Because the transistors remain in the linear region rather than deep saturation, they can switch much faster than saturating logic families. Emitter followers at the outputs provide low impedance and the ability to drive multiple loads without speed penalty.

ECL was the dominant logic family for high-speed systems from the 1960s through the 1980s, particularly in mainframe computers, military signal processing, and telecommunications equipment. Speeds exceeded all competitors by a large margin: a 10 kHz ripple counter that might take 200 nanoseconds in TTL could run in 20 nanoseconds with ECL. However, ECL paid a steep price in power consumption, typically drawing five to ten times more current than equivalent CMOS at the same frequency. The need for dual power supplies (typically +5.2 V and -5.2 V) and carefully controlled impedance-controlled PCB traces also made systems complex and expensive.

ECL is now nearly extinct in new designs. The rise of CMOS technology, combined with advances in layout and circuit techniques, allowed CMOS to match or exceed ECL speeds while consuming far less power. Modern GaAs and SiGe technologies can achieve nanosecond switching in CMOS form factors. A handful of legacy ECL chips remain in production for military and aerospace applications where replacement is restricted by qualification rules, but educational institutions and new commercial work rarely encounter them.

The name reflects the circuit topology: the emitters of the differential pair are coupled together at a common node (the tail), which connects to ground through a current source. This emitter coupling is what distinguishes ECL from other BJT logic families like RTL (resistor-transistor logic) or DTL (diode-transistor logic), where coupling occurs at different points in the circuit. Understanding ECL matters today mainly for engineers maintaining legacy systems, understanding the history of digital design trade-offs, and recognizing why PCB impedance control and transmission-line termination became critical skills in the high-speed era.