fanin

Fanin is the number of separate input lines or signal paths that can connect to a single logic gate or digital component. In a simple AND gate with two inputs, the fanin is 2; in a four-input OR gate, the fanin is 4. It is a basic property of gate design and directly affects how circuits are built and optimized.

Higher fanin reduces the number of gates needed to combine multiple signals into a single output. A five-input NAND gate can replace a cascade of two- or three-input gates, cutting propagation delay and board space. However, increasing fanin makes the gate slower and more power-hungry because larger transistor stacks are required to implement the logic function, and input capacitance grows with each additional input.

In practice, most logic families offer standard fanin options. TTL and CMOS buffers, AND gates, OR gates, and multiplexers typically come in two-, four-, eight-, and sometimes sixteen-input variants. Custom ASICs and FPGAs allow designers to specify fanin more freely, but physical limits still apply: very high fanin gates become impractical due to timing skew between early and late inputs.

Fanin is distinct from fanout, which measures how many gates one output can drive. A digital design often faces a tradeoff: use high-fanin gates to simplify logic depth and reduce fanout loading, or use lower-fanin gates and accept more stages of logic. The choice depends on clock speed, power budget, and available gate types.

The term comes from signal flow thinking: information fans in from multiple sources into a single point. In wider contexts, fanin applies to any collector or aggregator that accepts multiple inputs, including multiplexers, summing nodes, and even some analog front ends where multiple sensor signals combine before processing.