ratioless
Not based on the relative sizes of components in a circuit.
ratioless: a circuit that ignores component geometry
A ratioless circuit is one in which the output or behavior does not depend on the ratio between component values, geometries, or physical dimensions. In analog electronics, this contrasts sharply with ratio-dependent designs where performance hangs entirely on how one transistor size compares to another, or how one resistor compares to its pair. Ratioless topologies eliminate that sensitivity, making circuits more robust across manufacturing tolerances and temperature drift.
The classic example is the current mirror. A standard current mirror copies an input current to an output by matching transistor width-to-length ratios; if those ratios are mismatched, the copy is wrong. A ratioless current mirror, by contrast, uses feedback or a different architecture to enforce equal voltages or currents without requiring precise geometric matching. The gain or transfer function emerges from physics (threshold voltages, transconductance) rather than from precision layout.
Where ratioless design buys you freedom
Ratioless circuits are especially valuable in analog-to-digital converter frontends, precision amplifiers, and integrated comparators where the chip must perform the same way whether a transistor is 5 micrometers or 7 micrometers wide. Process variations during fabrication can shift all component values by 10 to 20 percent; a ratio-dependent circuit fails, but a ratioless one adapts. This is why switched-capacitor circuits, which rely on charge conservation rather than on capacitor ratios, have become the backbone of modern analog filters and data converters.
The trade-off is complexity. A ratioless design often needs more transistors, more feedback loops, or more cleverness in signal routing to avoid the ratio trap. It may also need careful biasing and compensation to stay stable. But when your product ships in millions of units and yield margins are thin, eliminating the need to match transistors to within 5 percent is worth the extra die area and design effort.
The term ratioless itself emerged in the 1980s as integrated analog circuit design matured and designers learned to separate topology from geometry. It remains central to the vocabulary of analog IC engineers who must design circuits that work in both the lab and the fab.