DPRAM

A dual-port RAM is a memory chip with two independent sets of address, data, and control lines. Both ports can access the same memory cells simultaneously, allowing one circuit to read or write while another does the same without waiting. This is different from standard single-port RAM, which can serve only one caller at a time, forcing the other to queue.

The most common application is bridging two clock domains. A microcontroller running at one frequency writes data into port A while a separate processor or peripheral reads from port B in real time, without either needing to pause or coordinate. This avoids the latency and complexity of handshake protocols. DPRAMs are also used as elastic buffers between asynchronous data streams, capturing bursts on one side and releasing them at a different rate on the other.

Dual-port memory costs more per bit than single-port RAM because it requires duplicate address decoders, sense amplifiers, and read/write control logic. Capacity is typically smaller, ranging from a few hundred bytes to a few megabytes per chip. Access time on one port may suffer if both ports try to reach the same cell; some designs enforce priority rules or stall the lower-priority access, turning the dual-port into a bottleneck if contention is high.

DPRAM is distinct from true dual-access RAM, where both ports can write independently without conflict. It is also different from cache coherency schemes, which use memory protection and invalidation rather than a second physical port. In modern designs, DPRAM is less common than it once was; FIFO buffers built in firmware, asynchronous FIFO ICs, or on-chip dual-port SRAM embedded in FPGAs often serve the same purpose with better integration.