ECL

Emitter-coupled logic is a digital circuit family built on bipolar junction transistors configured in a differential pair topology. Instead of switching transistors fully on and off like TTL or CMOS, ECL transistors operate in a linear region where they are always conducting. Current flows from one transistor to another in the pair, and the output is taken from the emitters. This design produces remarkably fast signal transitions, typically 1 to 2 nanoseconds, making ECL the fastest general-purpose logic family ever manufactured.

The speed comes from a fundamental advantage: because transistors never saturate, there is no charge storage delay to overcome when switching state. The penalty is high power consumption, typically 25 to 50 milliwatts per gate, and tight voltage margins. ECL operates on negative supply rails (typically minus 5.2 volts) with ground as the other rail. Output voltage swings are small, around 800 millivolts, which keeps noise margins tight and demands careful board layout and termination.

When ECL dominated, and where it survives

ECL peaked in the 1980s and early 1990s in high-performance computers, especially supercomputers, mainframes, and military systems where raw speed justified the power bills and board space. Motorola and Fairchild supplied the main families. As CMOS technology scaled down and clock rates rose, the gap narrowed. Today ECL is largely obsolete in new designs, displaced by CMOS families that now run gigahertz speeds while burning less power. However, ECL circuits remain in service in legacy equipment and in niche applications like extreme-speed analog comparators or specialized RF and microwave systems where the differential structure and speed still offer advantages.

The main variants were standard ECL (MECL), with propagation delays around 2 nanoseconds, and ECL III, which pushed toward 1 nanosecond. Some manufacturers offered lower-power variants. Because of its differential nature, ECL sits at a different design philosophy from single-ended logic; mixing ECL with TTL or CMOS requires level translation circuits and careful impedance matching on printed circuit boards to preserve the speed advantage and avoid reflections on transmission lines.