EPIC

An EPIC is an integrated circuit built by epitaxial deposition, a process in which single-crystal layers of semiconductor material are grown atomically on a substrate. Unlike standard ICs formed by etching and diffusion, EPICs are constructed by depositing successive layers of controlled composition and thickness directly onto a base wafer, typically silicon. This bottom-up growth method allows precise control over doping profiles and layer thickness down to microns or better, which made EPICs valuable for high-frequency and high-power applications where conventional fabrication methods fell short.

The epitaxial growth happens in a reactor chamber, usually at elevated temperature and under carefully managed gas flow. For silicon EPICs, the most common precursor is silane or dichlorosilane gas; for compound semiconductors like gallium arsenide, organometallic vapours are used. Each layer can have different conductivity type (n or p) and different dopant concentration, allowing the designer to build in built-in electric fields and junctions within the solid crystal matrix rather than by implantation or diffusion steps. This made EPICs especially suited to power devices and RF circuits where sharp junctions and low series resistance were critical.

Where EPICs sat in the market

EPICs flourished in the 1960s and 1970s for specialist applications: power rectifiers, Schottky diodes, and RF amplifiers. Companies like Varian and RCA produced notable EPIC power devices. However, as ion implantation and photolithography improved, conventional planar IC processes became competitive for most applications. EPIC manufacturing was expensive and difficult to scale, so the term largely fell out of commercial use by the 1980s. Epitaxial techniques remain fundamental to semiconductor production today (all modern wafers start with epitaxial layers), but the term EPIC itself is now mainly historical.

The strength of EPICs lay in their ability to create abrupt doping transitions and thick, low-resistivity layers without thermal cycles that would degrade earlier layers. For power semiconductors this meant lower forward voltage drop and better thermal stability. The weakness was process complexity, reduced yield, and difficulty in integrating logic and analog functions on the same chip. Once lithography could pattern features below one micron, the simpler planar process could achieve similar or better results with higher production volume and lower cost.