mesa

A mesa is a raised plateau of semiconductor material, typically silicon or gallium arsenide, that sits above an insulating layer or air gap. The structure is created by etching away material around a central block, leaving the active components standing higher than their surroundings. In semiconductor fabrication, the mesa serves as the physical foundation for transistors, diodes, and other devices that need electrical isolation from neighboring circuits on the same wafer.

The term comes directly from geology, where a mesa is a flat-topped mountain surrounded by lower land. The analogy holds: semiconductor mesas are literal raised islands of conducting material. The height typically ranges from a fraction of a micron to several microns, depending on the device type and technology node. Gallium arsenide mesas, common in high-frequency and optoelectronic applications, are often 1 to 4 microns tall. Silicon mesas used in power devices or specialized analog circuits may be taller, sometimes 10 microns or more.

Isolation and Current Confinement

Mesas provide both electrical isolation and lateral current confinement. When material is etched away around the raised structure, the remaining edges are exposed to either air, an oxide layer, or a more resistive material. This creates a natural boundary that prevents current from spreading laterally into unwanted regions. For heterojunction bipolar transistors (HBTs) in compound semiconductors, the mesa defines the emitter width and controls the current path through the active region. Poorly designed mesas, with walls that are too sloped or too rough, suffer from edge leakage currents and lower breakdown voltages.

Mesa etching is a subtractive process, usually performed with reactive ion etching (RIE) or wet chemical etches. The anisotropy and sidewall profile matter enormously. A vertical, smooth sidewall delivers better isolation; a sloped or rough sidewall creates parasitic paths. The depth of the etch must be controlled precisely, especially in multilayer structures where underlying layers or substrates must not be damaged. Overetch can compromise device performance or create mechanical weakness; underetch leaves unwanted conductive material that bridges between isolated regions.

In modern semiconductor manufacturing, mesas compete with other isolation techniques such as shallow trench isolation (STI) and junction isolation. Mesas are still preferred in high-speed analog, power electronics, and certain optoelectronic applications where their well-established processing and predictable performance matter. They are less common in mainstream digital logic, where planar CMOS and STI dominate due to density and cost advantages.