net
A conductor that interconnects two or more component terminals.
net: the invisible wiring inside your design
In circuit board design and schematic capture, a net is a single conductor path that ties together two or more component pins. It represents electrical continuity between those pins, whether that conductor is a copper trace on a PCB, a wire in a harness, or a node in a schematic diagram. Every net carries a signal or power supply to multiple destinations; a ground net might connect hundreds of component pins to a common return path.
Nets are named and tracked throughout the design process. A schematic might call one net VCC_5V, another GND, and a third CLK_DATA. Design software maintains a netlist, a file that documents every net and which pins belong to it. The PCB layout tool uses this netlist to ensure that every pin connection specified in the schematic becomes a physical trace or via on the board. If a pin is left unconnected in the layout, it becomes a floating net and will cause the design to fail.
Variants and complications
Nets are simple in principle but complex in practice. A single net can span multiple layers of a multi-layer board, route around obstacles, and include multiple vias to change layers. High-speed signal nets require careful impedance control and length matching to prevent signal degradation. Power and ground nets must be wide enough to handle current without excessive voltage drop; undersized nets generate heat and can damage components. In mixed-signal boards, analog and digital signal nets must be routed separately to prevent noise coupling.
The term comes from the visual appearance of early schematic diagrams: the lines connecting component pins looked like a net. In modern CAD tools, nets are still drawn as lines in the schematic view, but they are abstract representations of electrical connection. A net that appears as a simple line in the schematic might become a complex routed path on the physical board, especially in high-density designs with hundreds of nets competing for limited routing space.
Net integrity is checked at multiple stages: the schematic is verified against the design rules, the layout is checked against the netlist, and fabricated boards are tested with automated optical inspection and in-circuit testing to catch opens, shorts, and misrouted nets. A single shorted net, where two nets touch accidentally, can disable an entire board.