full adder

A full adder is a digital logic circuit that adds three single-bit binary inputs and produces a two-bit output. The three inputs are typically labeled A, B, and Cin (carry-in). The two outputs are the sum bit (S) and the carry-out bit (Cout). In industrial control systems, processors, and arithmetic units, full adders form the building blocks of larger addition circuits that handle multi-bit numbers.

The circuit outputs a sum bit that equals 1 when an odd number of the three inputs are 1, and a carry-out that equals 1 when two or more inputs are 1. This behavior comes from the underlying Boolean logic: the sum is the XOR of all three inputs, while the carry is produced by majority voting. A full adder differs from a half adder, which accepts only two inputs and produces no carry-in capability, making it useful only for the least significant bit position in a calculation.

Implementation and variants

Full adders are built using basic gates: AND, OR, and XOR gates in various configurations. A typical implementation requires five gates and handles the addition at the propagation speed of those gates, typically several nanoseconds. The circuit can be implemented in TTL (transistor-transistor logic), CMOS, or as part of a larger integrated circuit. When speed matters, ripple-carry adders connect full adders in series, but the carry must propagate through each stage, which becomes slow for wide numbers. Look-ahead carry schemes bypass this delay by computing carries in parallel.

In practical systems, full adders rarely work alone. A 4-bit adder cascades four full adders to add two 4-bit numbers. Processors use arrays of adders for arithmetic logic units. Modern CPUs integrate adder logic at the instruction level, but the full adder remains the conceptual and often physical unit of addition at the transistor level. Verification of full adder truth tables forms a standard exercise in digital design courses because correctness here propagates through every arithmetic operation the machine performs.

Faults in full adders typically appear as stuck bits in the carry chain or as timing violations when inputs change faster than the circuit can settle. Testing requires checking all eight input combinations and ensuring both outputs respond correctly. The term 'full' has stuck because it contrasts clearly with the half adder, and because it represents a complete, general-purpose single-digit addition building block that accepts all necessary inputs.