SDR

Single data rate memory transfers one piece of data per clock cycle. On each rising edge of the clock signal, the memory either reads or writes a single data word. This is the baseline mode for dynamic RAM, and it defined memory performance for decades before faster variants emerged in the 1990s.

SDR DRAM typically operates at bus speeds between 66 MHz and 133 MHz, with data widths of 32 or 64 bits. A 66 MHz SDR module with a 64-bit bus delivers roughly 528 MB/s of sustained throughput. The voltage standard is 3.3 volts, and the modules use a 168-pin DIMM form factor. Refresh cycles occur every 64 milliseconds to maintain data integrity.

SDR versus faster successors

DDR memory, introduced around 2000, transfers data on both the rising and falling edges of the clock, doubling throughput at the same frequency. DDR2, DDR3, and newer standards built on this principle, pushing clock speeds higher and reducing voltage to 2.5 volts or lower. Despite these advances, SDR remained in use for embedded systems, legacy industrial equipment, and cost-sensitive applications where bandwidth demand was modest.

SDR modules are now obsolete in consumer electronics and servers, but remain stocked for retrofit and repair work in factories, control systems, and test equipment built before 2005. Sourcing new SDR DRAM is difficult; most supply comes from salvage or overstocked inventory. Technicians working with older programmable logic controllers, numeric control machines, or process instruments should verify memory type before ordering replacements.