source

In a field effect transistor, the source is the terminal through which charge carriers (electrons or holes) enter the semiconductor channel. It is the counterpart to the drain, which is where those carriers exit. The gate, a third terminal, controls the width of the conductive channel between source and drain by applying an electric field perpendicular to the current flow, which is why the device is called a field effect transistor.

The naming convention reflects the electrical behavior: current flows from source to drain (in the conventional current sense), making the source analogous to the source of a river. In an N-channel device, electrons accumulate near the source terminal when a suitable potential is applied. In a P-channel device, holes serve as the mobile charge carriers instead. The source terminal is usually held at ground potential or a reference voltage during operation, making it the electrical anchor point of the transistor.

Practical construction and behavior

Physically, the source is a heavily doped region of semiconductor material, typically formed by diffusion or ion implantation. In integrated circuits and discrete transistors alike, it connects to the outside world through a metallic contact. The source-to-substrate (or source-to-bulk) connection is critical: if the bulk is allowed to float electrically, parasitic bipolar effects and unwanted conduction paths can emerge, degrading transistor performance or causing latchup.

In practical circuits, the source impedance and its resistance to ground determine the biasing conditions and frequency response of the stage. A large source resistor creates negative feedback that stabilizes gain and improves linearity; a small source resistor allows faster signal swings. Source followers, where the output is taken from the source terminal itself rather than the drain, form a valuable buffer stage with high input impedance and moderate output impedance.

Confusion sometimes arises in power applications where large currents flow. The source terminal of a power MOSFET must have low inductance in its connection to the gate driver return path, otherwise gate-source voltage overshoots during switching and reliability suffers. In RF circuits, source inductance causes degeneration that reduces gain, requiring careful layout to minimize parasitic effects.