TDC

A time-to-digital converter is an integrated circuit or module that measures the time interval between two electrical pulses and outputs that interval as a digital value. The input is usually a START signal and a STOP signal, separated by nanoseconds or picoseconds. The output is a binary number representing that delay. In power systems, detectors, and high-energy physics experiments, TDCs replace analog oscilloscopes and delay-line circuits to capture timing data in real time and at high speed.

The core of most TDCs is a tapped delay line: a chain of logic gates or inverters, each introducing a fixed propagation delay of 50 to 200 picoseconds. When the START pulse arrives, it begins propagating down the line. When STOP arrives, a snapshot encoder records which tap the pulse has reached. That tap number becomes the time measurement. Modern TDCs may use multiple parallel delay lines, interpolation between taps, or sub-gate-delay encoding to improve resolution below the inherent gate delay.

Resolution, accuracy, and the count-rate problem

Resolution is typically 10 to 100 picoseconds per count, depending on the delay-line pitch and interpolation method. Accuracy depends on temperature stability, supply voltage regulation, and process variation in the silicon. TDCs suffer a dead time after each measurement: the delay line must reset before it can measure again. High-count-rate applications may require multiple TDC channels in parallel or a very fast reset circuit. In radiation detectors and time-of-flight mass spectrometry, dead time of a few microseconds can introduce substantial bias in the data.

TDCs are found in gamma-ray timing, LiDAR, nuclear instrumentation, and ultrasonic ranging. They appear as standalone ASICs (application-specific integrated circuits), as embedded blocks in FPGAs, or as compact modules with analog input stages. The naming convention reflects the function: digital conversion of a time interval. The alternative analog approach, using a voltage ramp and ADC, is slower and less precise over short intervals; the TDC trades architecture for speed and resolution in the picosecond to nanosecond regime.

Calibration of a TDC is essential before use. The delay per tap drifts with temperature, so systems often include on-chip calibration circuits or require periodic external reference pulses. Nonlinearity across the delay line, missing codes at certain output values, and integral nonlinearity of 1 to 5 percent are common. When selecting or designing with a TDC, check the datasheets for differential nonlinearity, integral nonlinearity, and temperature coefficient to ensure the measurement uncertainty is acceptable for the application.