unclocked

An unclocked circuit operates without a master clock signal synchronizing its logic gates and transitions. Instead of waiting for a clock pulse to strobe data through registers and flip-flops, unclocked systems propagate signals through combinational logic based purely on gate delays and input changes. This stands in direct contrast to the clocked synchronous circuits that dominate modern digital design, where every state change happens on a clock edge.

Unclocked design appears primarily in asynchronous logic and handshake protocols. A simple combinational multiplexer is unclocked: its output updates immediately when inputs change, governed only by propagation delays through NAND and NOR gates. Asynchronous FIFOs and arbiters use unclocked acknowledge and request signals to coordinate data flow between clock domains without a shared timebase. These circuits rely on state encoding schemes like Gray coding to avoid metastability during transitions.

Where unclocked matters in practice

Unclocked design reduces latency in specific roles. A priority encoder that selects which interrupt line to service can respond within nanoseconds rather than waiting for a clock period. Asynchronous pipeline stages in high-speed interconnects use unclocked handshake logic to move data between pipeline stages without global timing constraints. However, unclocked circuits are harder to design correctly: timing verification requires exhaustive state analysis rather than simple clock-based simulation, and testing demands careful attention to race conditions and oscillation.

The term reflects the absence of a clock signal, not the absence of timing itself. Unclocked circuits remain bound by gate delays, signal propagation, and the fundamental physics of charge movement through silicon. Formal verification tools for asynchronous logic must account for all possible orderings of these delays to guarantee correctness. A designer choosing unclocked logic accepts complexity in exchange for lower latency, lower power consumption in idle states, or independence from global clock distribution.