memory bank

A memory bank is a contiguous block of addressable storage locations in a digital system, typically organized as a physical or logical unit that can be accessed, read, or written as a group. In microcontroller and microprocessor design, the total available memory is divided into banks to simplify addressing, manage physical constraints, or segregate different types of data. Each bank occupies a defined range of memory addresses, and the processor selects which bank to access through bank-select signals or dedicated address lines.

Memory banks are most commonly seen in embedded systems and industrial controllers with limited address space. An 8-bit microcontroller might have 256 bytes total RAM divided into two 128-byte banks, requiring a bank-select pin or register bit to toggle between them. In larger systems, banks may represent different physical modules: static RAM (SRAM) in one bank, flash storage in another, or external memory on a third. This segmentation allows designers to use simpler address decoders and to manage power consumption by activating only the banks needed for a given task.

Organization and access

Each location within a bank is identified by its offset address within that bank. The processor generates a bank address (which bank to use) and an offset address (which cell within that bank). Switching between banks introduces a small latency penalty; code running in one bank that needs to read data from another must first execute a bank-select instruction. In systems with dual-port or multi-port memory architectures, different banks can be accessed simultaneously by different circuits or processor cores.

Corruption or misuse of bank-select logic causes a common class of firmware bugs: reading or writing to the wrong memory bank because the bank-select register was left in an unexpected state. In industrial applications, this failure mode can be particularly dangerous if a bank switch error causes control parameters stored in one bank to be overwritten by unrelated data from another bank. Careful initialization of bank-select signals during system startup and explicit bank switching before cross-bank access are standard defensive practices.

The term also appears in larger systems: dynamic RAM (DRAM) chips are internally organized into banks to support the interleaving of memory requests and reduce refresh overhead. In DRAM, banks are physical subdivisions within a single chip that can be accessed in parallel; a modern DDR4 module may have 8 or 16 banks per chip. Industrial equipment using standard DRAM modules rarely needs to manage banks directly, but memory-constrained embedded controllers absolutely do.