via

A via is a small conductive hole drilled through a printed circuit board (PCB) that electrically connects copper traces on different layers. The hole is typically 0.3 mm to 0.8 mm in diameter, and its walls are coated with copper through an electroplating process called electroless copper deposition followed by electrolytic plating. This plating creates a continuous conductive path from the top layer to the bottom layer, or to any intermediate layers the via passes through.

Vias are essential in multilayer PCBs because they allow signal routing to escape the constraints of a single layer. A two-layer board needs vias to connect top-side traces to bottom-side traces; a six-layer board uses them to jump between any layers needed. Without vias, designers would be forced to route signals around obstacles at enormous cost in board space and signal integrity.

Through-hole vias pass completely from one side of the board to the other. Blind vias connect an outer layer to an inner layer but do not exit the opposite outer surface, saving space in dense designs. Buried vias connect two inner layers only. The diameter of the via, the thickness of copper plating, and the quality of the plating all affect electrical resistance and current-carrying capacity. A typical through-hole via might carry 0.5 to 2 amperes depending on its copper cross-section and the ambient temperature.

Via placement and density create thermal and electrical challenges. Vias under high-speed signal lines can introduce impedance discontinuities if not carefully managed; thermal vias clustered under hot components conduct heat away to inner copper planes. Via drill breakout, where the drill bit tears copper pads or breaks alignment, is a common manufacturing defect. Inadequate via plating thickness leads to opens and reliability failures in the field.

The term via derives from Latin for 'by way of' or 'through', reflecting its function as a conducting path. In integrated circuits, vias perform the same role at microscopic scale, connecting metal layers in the semiconductor stack. PCB designers must balance via density against manufacturing cost and yield; too many vias in a small area make the board harder to produce reliably.